Computer Architecture
Instructors: Rabi Mahapatra
TEXT BOOK Required
Lectures Download here
Instructors: Rabi Mahapatra
TEXT BOOK Required
- [PaHe2004] David. A. Patterson and John L. Hennessy, Computer Organization and Design: The Hardware/Software Interface, Third Edition, Morgan-Kaufmann Publishers Inc. 2004, ISBN 1-55860-604-1
| Topic | Chapter Number |
| Introduction; The 5 components of a computer; Performance; Technology and Delay Modeling | Ch. 1, 4 |
| Intro to Instruction Set Architecture (ISA) Design; MIPS ISA; Translation of High-Level C Constructs into MIPS; Assemblers, Object Code Generation, Linking and Executable Loading; Run-time Execution Environment | Ch. 2, App. A., D.1-D.3 |
| Review of Digital-Logic Design for Combinational Circuits | App. B. |
| Introduction to Hardware Description Languages (Verilog) and the Design-Simulation Process; Overview of Computer Arithmetic and ALU Design; Structural Designs in Verilog | Ch. 3 |
| Review of Digital-Logic Design for Sequential Circuits; Register-Transfer Level Description of Systems | App. B. |
| Single-Cycle Datapath and Control; Multi-cycle Datapath and Control; Micro-programming and Hard-wired Control Units; Behavioral HDL Description of Systems; Exceptions Handling | Ch 5, App. C |
| Intro to Pipelining; Pipelined MIPS Datapath; Pipeline Hazards: Structural, Control, Data; Hazard Detection and Resolution; Pipelining control; Exceptions Handling | Ch. 6 |
| Overview of SRAM and DRAM Design; Memory Hierarchy; Cache memory design | Ch 7 |
| Virtual memory | Ch 7 |
| Interface | Ch 8 |
Lectures Download here
|
Topic*
|
Notes
|
Reading
|
|
Lecture 1: Introduction,
Five Components of a Computer, Performance |
Chapter 1,4
|
|
|
Lecture 2: Introduction to MIPS
|
Chapter 2, App. A
|
|
|
Lecture 3 and 4: Introduction to MIPS (contd.)
|
Ch. 2, App. A, D.1-D.3
|
|
|
Lecture 5: Introduction to Verilog, Arithmetic
|
Ch. 3, App. B
|
|
|
Lecture 6: Integer & Floating Point
Arithmetic
|
Ch. 3, App. B
|
|
|
Lecture 7: Single Cycle Datapath Proc. Design
|
Chapter 5
|
|
|
Lecture 8: Multi Cycle Datapath Proc. Design
|
"
|
|
|
Lecture 9: Introduction to Pipelining
|
Chapter 6
|
|
|
Lecture 10: Pipelining (contd.)
|
Chapter 6
|
|
|
Lecture 11: Memory
|
Chapter 7
|
|
|
Lecture 12: Cache Memory
|
|
|
|
Lecture 13: Virtual Memory
|
||
|
Lecture 14: Interface
|
Chapter 8
|
