VLSI Design Automation PPT PDF SLIDES
VLSI Design Automation
Lecture Notes
Instructor: Prof. Shantanu Dutt
- Intro. Lecture Notes # 1: Introduction ppt
Auxiliary Intro notes: pdf
- Intro. Lecture Notes # 2 -- Chip Design Styles ppt
- Lecture Notes # 3 -- High Level Synthesis--Intro ppt
- Lecture Notes # 3b -- High Level Synthesis (courtesy of and copyrighted by Prof. Kia Bazargan) ppt
- Lecture Notes # 3c -- Register Allocation in High Level Synthesis pdf
- Lecture Notes # 4 -- VLSI Circuit Issues (no notes, actually :-(. But was done in class).
- Lecture Notes # 5 -- Partitioning (probability based) ps
pdf
- PROP Papers:
Conference version: S. Dutt and W. Deng, ``A probability-based approach to VLSI circuit partitioning'', Proc. Design Automation Conference, June 1996, pp. 100-105.
Journal version: S. Dutt and W. Deng, ``Probabilistic Approaches to VLSI Circuit Partitioning'', IEEE Trans. CAD, Vol. 19, No. 5, May 2000, pp. 534-549. ps(gzipped) , or pdf , or
Print version only for teaching purpose: pdf
- Lecture Notes # 6 -- Multilevel Partitioning - Hmetis ppt
- Lecture Notes # 7 -- Algorithmic Techniques in VLSI CAD ppt
- Lecture Notes # 8 -- Floorplanning intro, simulated annealing and mixed integer programming formulation pdf
- Lecture Notes # 8a -- Yet another (good) FP slide set pdf
- Lecture Notes # 8b -- Sequence-pair based floorplanning technique: (courtesy of Karthik Chandramouli) pdf
- Lecture Notes # 9 -- Intro to placement and basic PDP approach and rationale (hard copy)
- Lecture Notes # 9a -- Quadratic Placement: quadratic and linear WL objectives:
Notes (i) pdf
Notes (ii) ppt , pdf
- Lecture Notes # 9b -- Classical placement algorithms (min-cut, simulated annealing) pdf
- Lecture Notes # 9c -- Simultaneous level partitioning based PDP: ppt
- Lecture Notes # 10 -- General and Channel Routing: ppt
- Lecture Notes # 10a -- Maze and Line Routing: pdf
- Lecture Notes # 10b -- Global Routing: pdf
