Machine Structures

Machine Structures ppt slides

Instructor :David Patterson is a Professor in Computer Science at UC Berkeley

Books : 

No		Lecture Topic	Reading	Section
1		Course Introduction: Six Great Ideas Notes
2		Number Representation Notes	P&H (4th): 2.1-2.3, 2.6	Section 1: Number Rep. Handouts Read K&R Ch 2, Ch 3, Ch 6: 6.1, 6.2
		Introduction to C: Basic Language Elements Notes	P&H (4th): 2.9, 2.7 B. Harvey's Intro to C
		Introduction to C: Pointers, Arrays, Strings Notes	P&H (4th): 2.14, 2.8 C Reference Slides
3				Section 2: HOLIDAY: SECTION CANCELLED. Please still read K&R Ch 4, Ch 5
		MIPS Intro Notes	P&H (4th): 2.4
		MIPS lw, sw, Decisions I Notes	P&H (4th): 2.9, 2.10
4		MIPS Decisions II Notes	P&H (4th): 2.8, 2.10 (pg. 128-129 only), B.6	Section 3: MIPS Handouts
		MIPS Instruction Format I Notes	P&H (4th): 2.5, 2.10
		MIPS Instruction Format II Notes
5		MIPS Procedures I Notes	P&H (4th): 2.8, B.6	Section 4: MIPS Instructions and Procedures Handouts
		MIPS Procedures II & Logic Ops Notes	P&H (4th): 3.2, 2.6
		Memory Hierarchy: Direct Mapped Caches Notes	P&H (4th): 5.1
6		Memory Hierarchy: Cache-Memory Interface Notes	P&H (4th): 5.2 (pg. 457-470)	Section 5: Direct Mapped Caches Handouts
		Memory Hierarchy: Cache Performance Notes	P&H (4th): 5.3 (pg. 474-479)
		Floating Point Notes	P&H (4th): 2.14, 3.5, 3.8 IEEE 754 Simulator
7		Compilation, Assembly, Linking, Loading Notes	P&H (4th): 2.12, B.1-B.4	Section 6: Floating Point; C.A.L.L. Handouts
		Datacenters and Cloud Computing Notes	Warehouse-Scale Computers (PDF): Ch 1, Ch 3, Ch 5.1-5.3
			Warehouse-Scale Computers (PDF): Ch 2.4
8		Data Level Parallelism: Flynn Taxonomy Intel SSE SIMD Instructions Notes	P&H (4th): 1.5, 1.6, 7.1, 7.2, 7.4, 7.7	Section 7: Set Associative Caches Handouts
		Intel SIMD Continued, Thread Level Parallelism Notes	P&H (4th): 7.3, 5.8
		Thread Level Parallelism Notes	P&H (4th): 2.11
9		Thread Level Parallelism Notes		Section 8: Cache Coherency and Synchronization Handouts
		Intro to Synch. Digital Systems Notes	SDS Handout
		State and State Machines Notes	P&H (4th): 4.2, C.3-C.6 (on CD), State Handout
10		Combinational Logic Notes	P&H (4th): C.2-C.3 (on CD), Logic Handout	Section 9: Logic & SDS Handouts
		Combinational Logic Blocks Notes	Blocks Handout
		Single Cycle CPU Datapath Notes	P&H (4th): 4.1, 4.3, 4.4
11		Single Cycle CPU Control Notes	P&H (4th): 4.1, 4.3, 4.4	Section 10: Single Cycle Datapath Handouts
		Single Cycle CPU Control Notes	P&H (4th): 4.1,4.3,4.4
		Instruction Level Parallelism Notes	P&H (4th): 4.5-4.6
12		Instruction Level Parallelism Notes	P&H (4th): 4.7-4.8	Section 11: Pipelining Handouts
		Instruction-Level Parallelism Notes	P&H (4th): 4.7-4.8
13		Virtual Memory Notes	P&H (4th): 5.3-5.5, 5.10-5.12	Section 12: Virtual Memory Handouts
		Virtual Memory Notes	P&H (4th): 5.3-5.5, 5.10-5.12
		Virtual Memory Notes	P&H (4th): 6.2
14		I/O Basics Notes	P&H (4th): 6	Section 13: Virtual Memory (contd) Handouts
		I/O Networks Notes
15		I/O Disk Notes	Berkeley RAID Paper (PDF)	Section 14: I/O Handouts
		Amdahl's Law and the Economics of Parallelization EC2 Usage Stat Hoedown Notes
		Cal Cultural Heritage Performance winners Course Wrap-up Notes